Electronic circuits, such as integrated circuits, are used in a variety of products, from automobiles to microwaves to personal computers. Designing and fabricating these circuits involves many steps, known as a “design flow.” The particular steps of a design flow often are dependent upon the type of circuit being designed, its complexity, the design team, and the circuit fabricator or foundry that will manufacture the circuit. Typically, software and hardware “tools” will test a design at various stages of the design flow. The results of this testing then are used to identify and correct errors in the design. These testing processes are often referred to as verification, validation, or testing.
In some instances, verification will be facilitated by emulating the circuit design using a hardware emulator. Examples of hardware emulators include the VELOCE family of emulators available from Mentor Graphics Corporation of Wilsonville, Oreg. An emulator typically will provide a set of configurable components for mimicking the operation of a circuit design. For example, emulators that use field-programmable gate array circuits can emulate the functionality of a circuit design using a combination of state elements, memories and lookup tables. Of course, other types of emulators may provide additional or alternate primitive components. For example, an emulator may function by using combinatorial elements computing a selectable function over a fixed number of inputs.
Most emulators include the ability to have their total capacity partitioned into smaller sections. The ability to partition an emulator has many advantageous, such as reducing the amount of unused capacity during emulation. Most partitioning techniques have many restrictions however. For example, typically, a limit is imposed on the smallest capacity that the emulator can be partitioned into. Accordingly, for sub-portions of a circuit that are smaller than this limit, emulator capacity will still be unusable. Furthermore, some emulators limit the partitioning to an integral multiple of the minimum capacity limit.
Another way that emulators limit the partitioning is by requiring that each partition occupy one or more emulator “boards.” As indicated above, hardware emulators provide a set of configurable components that may be arranged to behave like the circuit design. Typically, these configurable components are placed onto a “board,” which includes the necessary wiring and connection structure to interconnect the configurable components. A single emulator board will have the ability to emulate a specified number of gates. In order to increase the capacity of the emulator, multiple boards can be connected together. Accordingly, many emulators restrict the emulator from being partitioned at less than the “board” level. More particularly, each partition must include one or more boards.
As can be appreciated, these restrictions often mean a significant amount of the total emulator's capacity is still unusable. For example, suppose an emulator with 12 boards and the ability to be partitioned at the board level were provided. Further suppose that a sub-portion of an SOC design that corresponded to the capacity of 1.2 boards (i.e. 10% of the total emulator capacity) were desired to be emulated in multiple partitions. Under this example, only 6 instances of the sub-portion could be instantiated in the emulator and 40% of the total emulator capacity would remain unusable.
In addition to verifying the functionality of circuit designs, hardware emulators are often used to test software designed to operate on the circuit. As those of ordinary skill in the art will appreciate, many modern circuit designs include both “hardware” content and “software” content. These types of circuits are often referred to as a system on a chip (“SoC” or “SOC”) and include multiple components packaged into the same circuit. Many SOC designs include a memory component that stores computer executable instructions designed to control some of the functionality or operation of the SOC. Hardware emulators then are used to allow the development and testing of these computer executable instructions prior to manufacturing of the circuit.
Similar to hardware verification, software verification is often performed using an emulator as a resource. More specifically, an emulator is configured to implement an electronic design. The emulator then is operated with computer executable instructions corresponding to the software as input to the electronic design. Subsequently, the operation of the software can be verified. However, as modern design cycles increasingly shorten, development and testing of the “software” content of a circuit design begins prior to finalizing the design of the “hardware” content. As a result, bugs in the hardware component are often found during software verification.